C. T. Tsai

The observation of trapping and detrapping effects in high-k gate dielectric MOSFETs by a new gate current Random Telegraph Noise (IG-RTN) approach

Chian-Sern Chang, Steve S. Chung, Y. S. Hsieh et al. · 2008 · 59 citations

Device Modeling, Electrical Engineering, Oxide Quality +14

Electrical characteristics of low temperature polysilicon TFT with a novel TEOS/oxynitride stack gate dielectric

Kow‐Ming Chang, Wen-Chih Yang, C. T. Tsai · IEEE Electron Device Letters · 2003 · 38 citations

Materials Science, Materials Engineering, Electrical Engineering +12

Ultra low p-type SiGe contact resistance FinFETs with Ti silicide liner using cryogenic contact implantation amorphization and Solid-Phase Epitaxial Regrowth (SPER)

Yu‐Chi Yang, N. Breil, C. Y. Yang et al. · 2016 · 26 citations

Engineering, Silicon On Insulator, Semiconductor Device +18

Strain Effects of Si and SiGe Channel on (100) and (110) Si Surfaces for Advanced CMOS Applications

Wen-Tai Chiang, J. W. Pan, Pu-Chun Liu et al. · 2007 · 18 citations

Sige Channels, Electrical Engineering, Engineering +15

The experimental demonstration of the BTI-induced breakdown path in 28nm high-k metal gate technology CMOS devices

E. R. Hsieh, Po-Sheng Lu, Steve S. Chung et al. · 2014 · 17 citations

Engineering, Breakdown Path, Semiconductor Device +16