Piet Engelke

X-masking during logic BIST and its impact on defect coverage

Yuyi Tang, Hans-Joachim Wunderlich, Piet Engelke et al. · IEEE Transactions on Very Large Scale Integration (VLSI) Systems · 2006 · 93 citations

Hardware Trojan, Engineering, Vlsi Design +19

A Simulator of Small-Delay Faults Caused by Resistive-Open Defects

Alejandro Czutro, Nicolas Houarche, Piet Engelke et al. · 2008 · 49 citations

Small-delay Fault, Engineering, Delay Faults +17

Automatic Test Pattern Generation for Interconnect Open Defects

Stefan Spinner, Ilia Polian, Piet Engelke et al. · Proceedings - IEEE VLSI Test Symposium/Proceedings of the ... IEEE VLSI Test Symposium · 2008 · 38 citations

Engineering, Test Data Generation, Software Engineering +19

Advanced Diagnosis

Felix Reimann, Michael Glaß, Jürgen Teich et al. · 2014 · 28 citations

Engineering, Computer Architecture, Software Engineering +16

Thread-Parallel Integrated Test Pattern Generator Utilizing Satisfiability Analysis

Alexander Czutro, Ilia Polian, Matthew Lewis et al. · International Journal of Parallel Programming · 2009 · 28 citations

Engineering, Software Testing, Formal Methods +10