G.T. Uehara - Concepedia

Author

G.T. Uehara

University of California, Berkeley

Also Known As

G. Uehara, G.T. Uehara, Greg Uehara

Publications

357

Citations

H-Index

Concepts

All Affiliations

University of California, Berkeley University of Hawaiʻi at Mānoa University of Hawaii System

About

G.T. Uehara is an author at University of California, Berkeley specializing in computer engineering, engineering, and electromagnetic compatibility.

Top Concepts

#	Concept	H-Index	Publications	Citations
1	Engineering	10	10	299
2	Computer Engineering	10	10	299
3	Electrical Engineering	6	6	185
4	Computer Science	3	3	101
5	Systems Engineering	1	1	36

G.T. Uehara

Publications

324

Citations

H-Index

Page 1

	Year	Citations
Design considerations for a high-performance 3-μm CMOS analog standard-cell library C.A. Laber, C.F. Rahim, S.F. Dreyer, IEEE Journal of Solid-State Circuits Electrical EngineeringEngineeringCircuit SystemData ConverterDesign Considerations	1987	74
A programmable CMOS dual channel interface processor for telecommunications applications B.K. Ahuja, P.R. Gray, W. Baxter, IEEE Journal of Solid-State Circuits Operational Amplifier FamilyEngineeringVlsi DesignAnalog Integrated CircuitsMixed-signal Integrated Circuit	1984	36
A 50 MHz eight-tap adaptive equalizer for partial-response channels Chun Wong, Jacques C. Rudell, G.T. Uehara, IEEE Journal of Solid-State Circuits Partial-response ChannelsEight-tap Adaptive EqualizerEngineeringMixed-signal Integrated CircuitChannel Equalization	1995	34
An LTE transmitter using a class-A/B power mixer Paolo Rossi, Nicola Codega, D. Gerna, Low-power ElectronicsWireless CommunicationsElectrical EngineeringEngineeringLte Transceiver	2013	33
Good trellises for IC implementation of Viterbi decoders for linear block codes H.T. Moorthy, Shu Lin, G.T. Uehara IEEE Transactions on Communications EngineeringViterbi DecodersJoint Source-channel CodingError Correction CodeLinear Block Codes	1997	31
A 200 MHz 9-tap analog equalizer for magnetic disk read channels in 0.6 μm CMOS Danfeng Xu, Yonghua Song, G.T. Uehara μM CmosMhz 9-TapAnalog-to-digital ConverterData ConverterMixed-signal Integrated Circuit	2002	25
A 100 MHz A/D interface for PRML magnetic disk read channels G.T. Uehara, P.R. Gray IEEE Journal of Solid-State Circuits EngineeringAnalog DesignComputer ArchitectureMhz Output RateIntegrated Circuits	1994	24
A 100 MHz output rate analog-to-digital interface for PRML magnetic-disk read channels in 1.2 μm CMOS G.T. Uehara, P.R. Gray Electrical EngineeringμM CmosSwitched-capacitor Fir PassiveEngineeringAnalog-to-digital Converter	2002	22
A CMOS analog front-end IC for DMT ADSL C.S.G. Conroy, S. Sheng, Asaf Feldman, Dynamic LinearityElectrical EngineeringB LinearityEngineeringAnalog-to-digital Converter	1999	18
Practical aspects of high speed switched-capacitor decimation filter implementation G.T. Uehara, P.R. Gray Electrical EngineeringEngineeringAnalog-to-digital ConverterLow-pass Filter FunctionAnalog Design	2003	14

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