S. Masui - Concepedia

Concepedia

Author

S. Masui

Fujitsu (Japan)

Also Known As

S. MASUI, S. Masui, Shun Masui

31

Publications

1.1K

Citations

11

H-Index

44

Concepts

All Affiliations

Fujitsu (Japan)Nippon Steel (Japan)University of Toronto

SM

About

S. Masui is an author at Fujitsu (Japan) specializing in electrical engineering, computer engineering, and engineering.

Top Concepts

#	Concept	H-Index	Publications	Citations
1	Engineering	11	13	1.1K
2	Computer Engineering	11	11	456
3	Applied Physics	3	3	748
4	Computer Science	2	2	62
5	Biomedical Engineering	1	1	11

S. Masui

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14

Publications

1.1K

Citations

11

H-Index

	Year	Citations
Experimental results and modeling techniques for substrate noise in mixed-signal integrated circuits D.K. Su, M.J. Loinaz, S. Masui, IEEE Journal of Solid-State Circuits Experimental ResultsElectrical EngineeringEngineeringVlsi DesignExperimental Technique	1993	591
Rapid simulation of substrate coupling effects in mixed-mode ICs Nishath Verghese, D.J. Allstot, S. Masui EngineeringVlsi DesignVlsi ChipInterconnect (Integrated Circuits)Electromagnetic Compatibility	2002	104
A Passive UHF RFID Tag LSI with 36.6% Efficiency CMOS-Only Rectifier and Current-Mode Demodulator in 0.35/spl mu/m FeRAM Technology Hiroyuki Nakamoto, Daisuke Yamazaki, Takuji Yamamoto, Rf DevicesLow-power ElectronicsElectrical EngineeringWireless CommunicationsCurrent-mode Demodulator	2006	74
An on-chip high-voltage generator circuit for EEPROMs with a power supply voltage below 2 V Kazuaki Sawada, Yohei Sugawara, S. Masui Low-power ElectronicsBootstrapped Clock GeneratorsElectrical EngineeringEnergy HarvestingEngineering	2002	57
A 13.56 MHz CMOS RF identification transponder integrated circuit with a dedicated CPU S. Masui, E. Ishii, T. Iwawaki, Hardware SecurityRf SubsystemElectrical EngineeringEngineeringRadio Frequency	2003	53
Simulation of substrate coupling in mixed-signal MOS circuits S. Masui Device ModelingElectrical EngineeringSemiconductor DeviceEngineeringTransistor Drain Voltages	2003	53
An area-efficient universal cryptography processor for smart cards Y. Eslami, Ali Sheikholeslami, P.G. Gulak, IEEE Transactions on Very Large Scale Integration (VLSI) Systems Hardware SecurityElectrical EngineeringCryptographic PrimitiveEngineeringNew Algorithm Instantiation	2006	51
A ferroelectric memory-based secure dynamically programmable gate array S. Masui, Teruhisa Ninomiya, M. Oura, IEEE Journal of Solid-State Circuits Non-volatile MemoryEngineeringMemory DesignEmerging Memory TechnologyFerroelectric Random-access Memory	2003	35
Design and applications of ferroelectric nonvolatile SRAM and flip-flop with unlimited read/program cycles and stable recall S. Masui, W. Yokozeki, M. Oura, Hardware SecurityNon-volatile MemoryElectrical EngineeringStable RecallEngineering	2004	28
A 13.56 MHz CMOS RF identification transponder integrated circuit with a dedicated CPU S. Masui Medical Entomology and Zoology EngineeringRadio FrequencyHigh-frequency DeviceMixed-signal Integrated CircuitAntenna	1999	17

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