Barry Daly

A 40 Gb/s Serial Link Transceiver in 28 nm CMOS Technology

Reza Navid, E-Hung Chen, Masum Hossain et al. · IEEE Journal of Solid-State Circuits · 2014 · 85 citations

Low-jitter Clock, Engineering, Clock Recovery +11

A 7.5Gb/s 10-Tap DFE Receiver with First Tap Partial Response, Spectrally Gated Adaptation, and 2nd-Order Data-Filtered CDR

Brian Leibowitz, Jade Kizer, Haechang Lee et al. · 2007 · 53 citations

Spectrally Gated Adaptation, Engineering, Equalization Updates +11

A 32mW 7.4Gb/s protocol-agile source-series-terminated transmitter in 45nm CMOS SOI

W.D. Dettloff, J.C. Eble, Lei Luo et al. · 2010 · 46 citations

Sst Transmitter, Electrical Engineering, Engineering +14

A 6.4-Gb/s Near-Ground Single-Ended Transceiver for Dual-Rank DIMM Memory Interface Systems

Michael Bucher, Ravi Kollipara, Bruce Su et al. · IEEE Journal of Solid-State Circuits · 2013 · 33 citations

Hardware Security, Electrical Engineering, Engineering +12

A Fast-Lock, Jitter Filtering All-Digital DLL Based Burst-Mode Memory Interface

Masum Hossain, Farrukh Aquil, P.S. Chau et al. · IEEE Journal of Solid-State Circuits · 2014 · 22 citations

Engineering, Vlsi Design, Computer Architecture +17