Rajesh Pamula

Architecture Considerations for Stochastic Computing Accelerators

Vincent T. Lee, Armin Alaghi, Rajesh Pamula et al. · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems · 2018 · 36 citations

Engineering, Energy Efficiency, Hardware Algorithm +16

A Unified Clock and Switched-Capacitor-Based Power Delivery Architecture for Variation Tolerance in Low-Voltage SoC Domains

Fahim ur Rahman, Sung Kim, Naveen John et al. · IEEE Journal of Solid-State Circuits · 2019 · 31 citations

Processor Energy Efficiency, Vlsi Design, Engineering +20

29.7 A Single-Inductor 4-Output SoC with Dynamic Droop Allocation and Adaptive Clocking for Enhanced Performance and Energy Efficiency in 65nm CMOS

Chi-Hsiang Huang, Xun Sun, Yidong Chen et al. · 2021 · 15 citations

System On Chip, Electrical Engineering, Engineering +13

19.1 Computationally Enabled Total Energy Minimization Under Performance Requirements for a Voltage-Regulated 0.38-to-0.58V Microprocessor in 65nm CMOS

Fahim ur Rahman, Rajesh Pamula, Akshat Boora et al. · 2019 · 12 citations

Engineering, Vlsi Design, Energy Efficiency +18