Steven K. Hsu

16.2 A 0.19pJ/b PVT-variation-tolerant hybrid physically unclonable function circuit for 100% stable secure key generation in 22nm CMOS

Sanu Mathew, Sudhir Satpathy, Mark Anders et al. · 2014 · 241 citations

Engineering, Computer Engineering, Electrical Engineering +17

2.4 Gbps, 7 mW All-Digital PVT-Variation Tolerant True Random Number Generator for 45 nm CMOS High-Performance Microprocessors

Sanu Mathew, Suresh Srinivasan, Mark Anders et al. · IEEE Journal of Solid-State Circuits · 2012 · 190 citations

Engineering, Computer Engineering, Electrical Engineering +17

53 Gbps Native ${\rm GF}(2 ^{4}) ^{2}$ Composite-Field AES-Encrypt/Decrypt Accelerator for Content-Protection in 45 nm High-Performance Microprocessors

Sanu Mathew, Farhana Sheikh, Michael E. Kounavis et al. · IEEE Journal of Solid-State Circuits · 2011 · 137 citations

Engineering, Computer Engineering, Computer Science +17

A 4-fJ/b Delay-Hardened Physically Unclonable Function Circuit With Selective Bit Destabilization in 14-nm Trigate CMOS

Sudhir Satpathy, Sanu Mathew, Vikram Suresh et al. · IEEE Journal of Solid-State Circuits · 2017 · 114 citations

Engineering, Computer Engineering, Electrical Engineering +15

<inline-formula> <tex-math notation="LaTeX">$\mu $ </tex-math> </inline-formula>RNG: A 300–950 mV, 323 Gbps/W All-Digital Full-Entropy True Random Number Generator in 14 nm FinFET CMOS

Sanu Mathew, D. J. Johnston, Sudhir Satpathy et al. · IEEE Journal of Solid-State Circuits · 2016 · 96 citations

Engineering, Computer Engineering, Electrical Engineering +17