N. Tendolkar

Novel techniques for achieving high at-speed transition fault test coverage for Motorola's microprocessors based on PowerPC/spl trade/ instruction set architecture

N. Tendolkar, R. Raina, R. Woltenberg et al. · 2003 · 77 citations

Engineering, Hardware Verification Language, Mem Testing +17

Analysis of Timing Failures Due to Random AC Defects in VLSI Modules

N. Tendolkar · 22nd ACM/IEEE Design Automation Conference · 1985 · 43 citations

Engineering, Vlsi Design, Computer Architecture +17

At-speed testing of delay faults for Motorola's MPC7400, a PowerPC/sup TM/ microprocessor

N. Tendolkar, R. Molyneaux, C. Pyron et al. · 2002 · 33 citations

Engineering, Mem Testing, Delay Faults +19

DFT advances in the Motorola's MPC7400, a PowerPC/sup TM/ G4 microprocessor

C. Pyron, M. Alexander, J. Golab et al. · 2003 · 23 citations

Low-power Electronics, Hardware Security, Electrical Engineering +15

A logic chip delay-test method based on system timing

Franco Motika, N. Tendolkar, C. C. Beh et al. · IBM Journal of Research and Development · 1990 · 19 citations

Hardware Security, Level-sensitive Scan Design, Engineering +14