In this work, we report on back-end-of-line (BEOL)-compatible InGaZnO indium gallium zinc oxide (IGZO) thin film transistors (TFTs) with extreme scaled device dimension including channel thickness (

${T}_{\text {ch}}{)}$

down to 1.5 nm and channel length (

${L}_{\text {ch}}{)}$

down to 60 nm. These IGZO channels with a high In atomic ratio of 92% were derived by atomic-layer-deposition (ALD), where the IGZO thickness could be precisely controlled by ALD cycles. These TFTs were subjected to a mild O2 annealing at 250 °C, the effect of which is also systematically investigated. It is found that both

${T}_{\text {ch}}$

and O2 annealing have significant effects on TFT performance. By using optimized O2 annealing conditions, the ALD IGZO TFTs with scaled

${T}_{\text {ch}}$

of 1.5 nm and

${L}_{\text {ch}}$

of 60 nm exhibit desirable electrical performance including a high ON/ OFF ratio (

${I}_{ \mathrm{\scriptscriptstyle ON}}/{I}_{ \mathrm{\scriptscriptstyle OFF}}{)}~\sim ~10^{{11}}$

, a decent high Ion of 354

$\mu \text{A}/\mu \text{m}$

under

${V}_{\text {DS}}$

of 1.2 V, a steep subthreshold swing (SS) of 68 mV/dec, a small drain-induced-barrier-lowering (DIBL) of 30 mV/V, and a normal-off operation, which is comparable to the state-of-art sputtered IGZO TFTs. Furthermore, the optimized TFTs also exhibit significantly resolved threshold voltage (

${V}_{\text {T}}{)}$

roll-off and a remarkably high degree of stability to the positive gate bias stress (PBS). A trap model with its possible microscopic origin is proposed, which explains well the dependence of electrical performance on both

${T}_{\text {ch}}$

and O2 annealing, thus providing a new insight into the reliability of IGZO TFTs.

#	Concept	H-Index	Publications	Citations
1	Engineering	1	1	47
2	Applied Physics	1	1	47
3	Electrical Engineering	1	1	47
4	Microelectronics	1	1	47
5	Semiconductors	1	1	47

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