Chunsheng Liu

Power-Aware Test Scheduling in Network-on-Chip Using Variable-Rate On-Chip Clocking

Chunsheng Liu, V. Iyengar, Jiangfan Shi et al. · 2005 · 61 citations

Hardware Security, Power-aware Test Scheduling, Power-aware Computing +11

Reuse-based test access and integrated test scheduling for network-on-chip

Chunsheng Liu, Zachariah Thomas Link, Dhiraj K. Pradhan · 2006 · 36 citations

Engineering, Computer Architecture, Hardware Security +16

Thermal-Aware Testing of Network-on-Chip Using Multiple-Frequency Clocking

Chunsheng Liu, V. Iyengar, Dhiraj K. Pradhan · 2006 · 35 citations

Hardware Security, Power-aware Computing, Thermal Balance +15

Reducing Algorithm Complexity for Computing an Aggregate Uncertainty Measure

Chunsheng Liu, Dominic Grenier, Anne-Laure Jousselme et al. · IEEE Transactions on Systems Man and Cybernetics - Part A Systems and Humans · 2007 · 29 citations

Engineering, Verification, Algorithm Complexity +16

Design and implementation of a time-division multiplexing scan architecture using serializer and deserializer in GPU chips

Amit Sanghani, Bo Yang, Karthikeyan Natarajan et al. · 2011 · 28 citations

Engineering, Hardware Algorithm, Computer Architecture +16