Rui Liu

A 65nm 4Kb algorithm-dependent computing-in-memory SRAM unit-macro with 2.3ns and 55.8TOPS/W fully parallel product-sum operation for binary DNN edge processors

Win-San Khwa, Jiajing Chen, Jiafang Li et al. · 2018 · 240 citations

Engineering, Computer Architecture, Multi-channel Memory Architecture +18

XNOR-RRAM: A scalable and parallel resistive synaptic architecture for binary neural networks

Xiaoyu Sun, Shihui Yin, Xiaochen Peng et al. · 2018 · 229 citations

Convolutional Neural Network, Image Analysis, Machine Learning +11

Electric-double-layer transistors for synaptic devices and neuromorphic systems

Yongli He, Yi Yang, Sha Nie et al. · Journal of Materials Chemistry C · 2018 · 228 citations

Electrical Engineering, Engineering, Electric-double-layer Transistors +10

Spatiotemporal Information Processing Emulated by Multiterminal Neuro‐Transistor Networks

Yongli He, Sha Nie, Rui Liu et al. · Advanced Materials · 2019 · 213 citations

Spatiotemporal Information Processing, Cognitive Science, Engineering +15

Ultra-Low-Energy Three-Dimensional Oxide-Based Electronic Synapses for Implementation of Robust High-Accuracy Neuromorphic Computation Systems

Bin Gao, Yingjie Bi, Hong-Yu Chen et al. · ACS Nano · 2014 · 187 citations

Engineering, Nanocomputing, Oxide-based Electronic Synapse +17