S.W. Bollinger

Heuristic technique for processor and link assignment in multicomputers

S.W. Bollinger, Scott F. Midkiff · IEEE Transactions on Computers · 1991 · 72 citations

Computing, Computer Engineering, Computer Science +17

Processor and Link Assignment in Multicomputers Using Simulated Annealing.

S.W. Bollinger, Scott F. Midkiff · Proceedings of the International Conference on Parallel Processing · 1988 · 68 citations

Computing, Computer Engineering, Computer Science +14

ON TEST GENERATION FOR I/sub DDQ/ TESTING OF BRIDGING FAULTS IN CMOS CIRCUITS

S.W. Bollinger, Scott F. Midkiff · 2005 · 34 citations

Engineering, Computer Engineering, Electrical Engineering +9

Design planning for high-performance ASICs

J. Sayah, Rohini Gupta, D. D. Sherlekar et al. · IBM Journal of Research and Development · 1996 · 30 citations

Engineering, Computer Engineering, Computer Science +12

Test generation for I/sub DDQ/ testing of bridging faults in CMOS circuits

S.W. Bollinger, Scott F. Midkiff · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems · 1994 · 25 citations

Engineering, Computer Engineering, Electrical Engineering +12