J.H. Panner

Boundary-scan design principles for efficient LSSD ASIC testing

R.W. Bassett, Mark E. Turner, J.H. Panner et al. · IBM Journal of Research and Development · 1990 · 75 citations

Numerical Analysis, Engineering, Vlsi Design +18

Low-cost testing of high-density logic components

R.W. Bassett, B.J. Butkus, S.R. Dingle et al. · IEEE Design & Test of Computers · 1990 · 41 citations

Engineering, Vlsi Design, Mem Testing +16

Low cost testing of high density logic components

R.W. Bassett, B.J. Butkus, S.L. Dingle et al. · 2003 · 37 citations

Logic Device Tester, Engineering, Computer Architecture +16

I/O impedance matching algorithm for high-performance ASICs

Paul S. Zuchowski, J.H. Panner, D.W. Stout et al. · 2002 · 11 citations

Engineering, Electronic Design, Computer Architecture +18