Pouria Bastani

Speedpath prediction based on learning from a small set of examples

Pouria Bastani, Kip Killpack, Li-C. Wang et al. · 2008 · 53 citations

Traffic Theory, Engineering, Vlsi Design +21

Design-silicon timing correlation

Li-C. Wang, Pouria Bastani, Magdy S. Abadir · Proceedings - ACM IEEE Design Automation Conference · 2007 · 38 citations

Physical Design (Electronics), Delay Test Data, Engineering +15

Case Study on Speed Failure Causes in a Microprocessor

Kip Killpack, Suriyaprakash Natarajan, Arun Krishnamachary et al. · IEEE Design & Test of Computers · 2008 · 35 citations

Engineering, Vlsi Design, Computer Architecture +19

Analyzing the risk of timing modeling based on path delay tests.

Pouria Bastani, Benjamin N. Lee, Li-C. Wang et al. · 2007 · 22 citations

Hardware Modeling, Technology Scales, Engineering +24

Statistical diagnosis of unmodeled systematic timing effects

Pouria Bastani, Nicholas Callegari, Li-C. Wang et al. · 2008 · 21 citations

Fault Diagnosis, Engineering, Machine Learning +23