Kiyomi Naruke

Stress induced leakage current limiting to scale down EEPROM tunnel oxide thickness

Kiyomi Naruke, S. Taguchi, Makoto Wada · 2003 · 190 citations

Engineering, Oxide Leakage, Eeprom Cell +16

A 5-V-only operation 0.6- mu m flash EEPROM with row decoder scheme in triple-well structure

Akira Umezawa, S. Atsumi, M. Kuriyama et al. · IEEE Journal of Solid-State Circuits · 1992 · 147 citations

Non-volatile Memory, Electrical Engineering, Cell Size +15

Radiation-Induced Interface States of Poly-Si Gate MOS Capacitors Using Low Temperature Gate Oxidation

Kiyomi Naruke, Masahiro Yoshida, K. Maeguchi et al. · IEEE Transactions on Nuclear Science · 1983 · 81 citations

Electrical Engineering, Engineering, Bias Temperature Instability +8

A self-convergence erasing scheme for a simple stacked gate flash EEPROM

Shigeru Yamada, Toshihiro Suzuki, E. Obi et al. · 2002 · 53 citations

Hardware Security, Non-volatile Memory, Electrical Engineering +11

A 16-Mb flash EEPROM with a new self-data-refresh scheme for a sector erase operation

S. Atsumi, M. Kuriyama, Akira Umezawa et al. · IEEE Journal of Solid-State Circuits · 1994 · 43 citations

Non-volatile Memory, Engineering, Emerging Memory Technology +17