Navonil Chatterjee

Fault-Tolerant Dynamic Task Mapping and Scheduling for Network-on-Chip-Based Multicore Platform

Navonil Chatterjee, Suraj Paul, Santanu Chattopadhyay · ACM Transactions on Embedded Computing Systems · 2017 · 36 citations

Hardware Security, Network-on-chip-based Multicore Platform, Heterogeneous Computing +15

Deadline and energy aware dynamic task mapping and scheduling for Network-on-Chip based multi-core platform

Navonil Chatterjee, Suraj Paul, Priyajit Mukherjee et al. · Journal of Systems Architecture · 2017 · 31 citations

Power-aware Computing, Manycore Processor, Engineering +11

Task mapping and scheduling for network-on-chip based multi-core platform with transient faults

Navonil Chatterjee, Suraj Paul, Santanu Chattopadhyay · Journal of Systems Architecture · 2018 · 31 citations

Transient Faults, Fault-tolerant Network, Engineering +12

A spare router based reliable Network-on-Chip design

Navonil Chatterjee, Santanu Chattopadhyay, Kanchan Manna · 2014 · 19 citations

Fault-tolerant Network, Engineering, Edge Computing +11

Dynamic Task Mapping and Scheduling with Temperature-Awareness on Network-on-Chip based Multicore Systems

Suraj Paul, Navonil Chatterjee, Prasun Ghosal · Journal of Systems Architecture · 2019 · 19 citations

Engineering, Many-core Architecture, Computer Engineering +11