Jorge Lagos

A 1-GS/s, 12-b, Single-Channel Pipelined ADC With Dead-Zone-Degenerated Ring Amplifiers

Jorge Lagos, Benjamin Hershberg, Ewout Martens et al. · IEEE Journal of Solid-State Circuits · 2019 · 75 citations

Electrical Engineering, Engineering, Data Converter +9

A Single-Channel, 600-MS/s, 12-b, Ringamp-Based Pipelined ADC in 28-nm CMOS

Jorge Lagos, Benjamin Hershberg, Ewout Martens et al. · IEEE Journal of Solid-State Circuits · 2018 · 69 citations

Data Converter, Mixed-signal Integrated Circuit, Ring Amplifier +6

A 10.1-ENOB, 6.2-fJ/conv.-step, 500-MS/s, Ringamp-Based Pipelined-SAR ADC With Background Calibration and Dynamic Reference Regulation in 16-nm CMOS

Jorge Lagos, Nereo Markulić, Benjamin Hershberg et al. · IEEE Journal of Solid-State Circuits · 2022 · 51 citations

Engineering, Calibration, Data Converter +11

A 4-GS/s 10-ENOB 75-mW Ringamp ADC in 16-nm CMOS With Background Monitoring of Distortion

Benjamin Hershberg, Davide Dermit, Barend van Liempd et al. · IEEE Journal of Solid-State Circuits · 2021 · 46 citations

3.1 A 3.2GS/s 10 ENOB 61mW Ringamp ADC in 16nm with Background Monitoring of Distortion

Benjamin Hershberg, Davide Dermit, Barend van Liempd et al. · 2019 · 41 citations

Background Monitoring, Enob 61Mw, Engineering +10