Silicon Photonic Transceiver Circuits With Microring Resonator Bias-Based Wavelength Stabilization in 65 nm CMOS

Cheng Li, Rui Bai, Ayman Shafik, +10

IEEE Journal of Solid-State Circuits

PhotonicsOptical InterconnectsEngineeringIntegrated PhotonicsPhotonic Interconnects +13

A 25 Gb/s Hybrid-Integrated Silicon Photonic Source-Synchronous Receiver With Microring Wavelength Stabilization

Kunzhi Yu, Cheng Li, Hao Li, +9

IEEE Journal of Solid-State Circuits

Photonic DevicePhotonicsEngineeringMicroring Wavelength StabilizationCorrelated Jitter +7

A ring-resonator-based silicon photonics transceiver with bias-based wavelength stabilization and adaptive-power-sensitivity receiver

Cheng Li, Rui Bai, Ayman Shafik, +8

PhotonicsEngineeringRing-resonator DevicesAdaptive-power-sensitivity ReceiverRing-resonator-based Silicon Photonics +11

A 0.47–0.66 pJ/bit, 4.8–8 Gb/s I/O Transceiver in 65 nm CMOS

Younghoon Song, Rui Bai, Kangmin Hu, +3

IEEE Journal of Solid-State Circuits

Low-power ElectronicsElectrical EngineeringOutput/input MultiplexingReceiver Equalizer OutputVlsi Design +12

22.4 A 24Gb/s 0.71pJ/b Si-photonic source-synchronous receiver with adaptive equalization and microring wavelength stabilization

Kunzhi Yu, Hao Li, Cheng Li, +9

PhotonicsWavelength StabilizationEngineeringOptical Transmission SystemMixed-signal Integrated Circuit +10

A 51Gb/s, 320mW, PAM4 CDR with baud-rate sampling for high-speed optical interconnects

N. D. Qi, Yuhang Kang, Qipeng Lin, +13

Optical MaterialsEngineeringOptical Transmission SystemOptical TransceiversOptical Computing +14

2.5 A 0.25pJ/b 0.7V 16Gb/s 3-tap decision-feedback equalizer in 65nm CMOS

Rui Bai, Samuel Palermo, Patrick Yin Chiang

EngineeringVlsi DesignEnergy EfficiencyComputer ArchitecturePower Electronic Systems +14

Broadband Waveguide-to-Microstrip Antipodal Finline Transition without Additional Resonance Preventer

Rui Bai, Yuliang Dong, Jun Xu

Additional Resonance PreventerPhotonicsEngineeringResonance FrequencyMicrowave Transmission +7

A 0.8V, 560fJ/bit, 14Gb/s injection-locked receiver with input duty-cycle distortion tolerable edge-rotating 5/4X sub-rate CDR in 65nm CMOS

Hao Li, Shuai Chen, Liqiong Yang, +5

Sub-rate CdrHigh-frequency DeviceClock RecoveryMixed-signal Integrated CircuitInjection-locked Receiver +5

A Fully Integrated 25 Gb/s Low-Noise TIA+CDR Optical Receiver Designed in 40-nm-CMOS

Juncheng Wang, Quan Pan, Yajie Qin, +10

IEEE Transactions on Circuits & Systems II Express Briefs

PhotonicsEngineeringFully Integrated 25Optical Transmission SystemTransimpedance Amplifier +11