Zunsong Yang

16.8 A 25.4-to-29.5GHz 10.2mW Isolated Sub-Sampling PLL Achieving -252.9dB Jitter-Power FoM and -63dBc Reference Spur

Zunsong Yang, Yong Chen, Shiheng Yang et al. · 2019 · 102 citations

Electrical Engineering, Engineering, Vlsi Design +11

A Calibration-Free, Reference-Buffer-Free, Type-I Narrow-Pulse-Sampling PLL With −78.7-dBc REF Spur, −128.1-dBc/Hz Absolute In-Band PN and −254-dB FOM

Zunsong Yang, Yong Chen, Pui‐In Mak et al. · IEEE Solid-State Circuits Letters · 2020 · 30 citations

Sampling (Signal Processing), Engineering, Measurement +16

A 10.6-mW 26.4-GHz Dual-Loop Type-II Phase-Locked Loop Using Dynamic Frequency Detector and Phase Detector

Zunsong Yang, Yong Chen, Shiheng Yang et al. · IEEE Access · 2019 · 25 citations · Full text

Low-power Electronics, Electrical Engineering, Engineering +13

A 0.003-mm² 440fs_RMS-Jitter and −64dBc-Reference-Spur Ring-VCO-Based Type-I PLL Using a Current-Reuse Sampling Phase Detector in 28-nm CMOS

Zunsong Yang, Yong Chen, Pui‐In Mak et al. · IEEE Transactions on Circuits and Systems I Regular Papers · 2021 · 25 citations

Electrical Engineering, Engineering, Clock Recovery +12

A 3.3-GHz Integer N-Type-II Sub-Sampling PLL Using a BFSK-Suppressed Push–Pull SS-PD and a Fast-Locking FLL Achieving −82.2-dBc REF Spur and −255-dB FOM

Zunsong Yang, Yong Chen, Jia Yuan et al. · IEEE Transactions on Very Large Scale Integration (VLSI) Systems · 2021 · 25 citations

In-band Phase Noise, −255-Db Fom, Bfsk-suppressed Push–pull Ss-pd +8