Machine vision requires CMOS image sensors (CISs) with high frame rate, short exposure time, and fine spatial resolution. Recently, capacitive transimpedance amplifier (CTIA) is used in the high-speed pixel circuit to achieve high sensitivity by expediting the charge transfer from the photodiode to a tiny integration capacitor ( C _INT ). Existing CTIA pixel designs have large pixel sizes due to the multiple sampling capacitors and switches for global shutter and CDS, which unfavorably limits the spatial resolution. In this paper, we present a 400 fps CIS design with 640 × 480 pixel array for machine vision. With simplified pixel circuits, the new sensor has a CTIA pixel size of 8.7 × 8.22 μm ² , which is the smallest in the category. The pixel implements a new multi-layer MOM capacitor with good uniformity as the tiny C _INT , which achieves high sensitivity (36.5 V/lux·s) without calibration. Pixel-wise CDS is implemented in this global-shutter CIS to minimize the pixel noise. The pixel signals are quantized by 640 column processing slices with 12 bit resolution at 411 kS/s. The size of the column SAR ADC is minimized with a simple calibration technique. The CIS is fabricated in a 0.18 μm mixed-signal CMOS process. The temporal noise is 15.6 e _rms ^- . With the new MOM capacitor, FPN of the CIS is 0.55% without calibration. The new pixel design achieves the highest sensitivity per unit area.

Wai Chiu Ng

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