Yi-Lin Chuang

Constraint graph-based macro placement for modern mixed-size circuit designs

Hsin-Chen Chen, Yi-Lin Chuang, Yao‐Wen Chang et al. · 2008 · 29 citations

Physical Design (Electronics), Engineering, Vlsi Design +12

Pulsed-latch aware placement for timing-integrity optimization

Yi-Lin Chuang, Sangmin Kim, Youngsoo Shin et al. · 2010 · 25 citations

Engineering, Vlsi Design, Electronic Design +16

Design-hierarchy aware mixed-size placement for routability optimization

Yi-Lin Chuang, Gi-Joon Nam, Charles J. Alpert et al. · 2010 · 22 citations

Engineering, Electronic Design Automation, Computer Architecture +21

Unified methodology for heterogeneous integration with CoWoS technology

Yi-Lin Chuang, Chung-Sheng Yuan, Ji-Jan Chen et al. · 2013 · 21 citations

Unified Methodology, Engineering, Industrial Engineering +21

Pulsed-latch-based clock tree migration for dynamic power reduction

Hong-Ting Lin, Yi-Lin Chuang, Tsung-Yi Ho · 2011 · 15 citations

Engineering, Vlsi Design, Power Optimization (Eda) +16