Cosimo Aprile - Concepedia

Author

Cosimo Aprile

École Polytechnique Fédérale de Lausanne ORCID

Also Known As

Aprile, Cosimo, C. Aprile, Cosimo Aprile

Publications

215

Citations

H-Index

Concepts

All Affiliations

École Polytechnique Fédérale de Lausanne IBM Research - Zurich IBM Research - Thomas J. Watson Research Center Korea Advanced Institute of Science and Technology

About

Cosimo Aprile is an author at École Polytechnique Fédérale de Lausanne specializing in engineering, computer engineering, and electrical engineering.

Top Concepts

#	Concept	H-Index	Publications	Citations
1	Engineering	6	6	165
2	Computer Engineering	6	6	165
3	Computer Science	2	2	32
4	Applied Physics	1	1	15
5	Biomedical Engineering	1	1	19

Cosimo Aprile

Publications

175

Citations

H-Index

Page 1

	Year	Citations
A 161-mW 56-Gb/s ADC-Based Discrete Multitone Wireline Receiver Data-Path in 14-nm FinFET Gain Kim, Marcel Kossel, Alessandro Cevrero, IEEE Journal of Solid-State Circuits Electrical EngineeringEngineeringPrototype Rx ChipData ConverterMixed-signal Integrated Circuit	2019	57
An Eight-Lane 7-Gb/s/pin Source Synchronous Single-Ended RX With Equalization and Far-End Crosstalk Cancellation for Backplane Channels Cosimo Aprile, Alessandro Cevrero, Pier Andrea Francese, IEEE Journal of Solid-State Circuits Far-end Crosstalk CancellationRx MacroEngineeringDecision-feedback Crosstalk CompensationMixed-signal Integrated Circuit	2018	42
Adaptive Learning-Based Compressive Sampling for Low-power Wireless Implants Cosimo Aprile, Kerim Türe, Luca Baldassarre, IEEE Transactions on Circuits and Systems I Regular Papers Wireless CommunicationsAdaptive CompressionMedical ElectronicsEngineeringBiomedical Engineering	2018	19
30.2 A 161mW 56Gb/s ADC-Based Discrete Multitone Wireline Receiver Data-Path in 14nm FinFET Gain Kim, Lukas Kull, Danny Luu, Hardware SecurityElectrical EngineeringEngineeringLegacy ChannelsData Converter	2019	18
A 24 kb Single-Well Mixed 3T Gain-Cell eDRAM with Body-Bias in 28 nm FD-SOI for Refresh-Free DSP Applications Jonathan Narinx, Robert Giterman, Andrea Bonetti, Non-volatile MemoryEngineeringVlsi DesignMemory DesignEmerging Memory Technology	2019	15
A 16-Channel Neural Recording System-on-Chip With CHT Feature Extraction Processor in 65-nm CMOS Arda Uran, Kerim Türe, Cosimo Aprile, IEEE Journal of Solid-State Circuits Wireless CommunicationsEngineeringWireless Implantable DeviceNeurochipMedical Instrumentation	2022	14
A 4.8pJ/b 56Gb/s ADC-Based PAM-4 Wireline Receiver Data-Path with Cyclic Prefix in 14nm FinFET Gain Kim, Lukas Kull, Danny Luu,	2019	10

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