Sai Lalith Chaitanya Ambatipudi

Design of a 50-Gb/s Hybrid Integrated Si-Photonic Optical Link in 16-nm FinFET

Mayank Raj, Yohan Frans, Ping-Chuan Chiang et al. · IEEE Journal of Solid-State Circuits · 2020 · 52 citations

Optical Materials, Engineering, Optical Transmission System +22

An Inverter-Based Analog Front-End for a 56-Gb/s PAM-4 Wireline Transceiver in 16-nm CMOS

Kevin Zheng, Yohan Frans, Sai Lalith Chaitanya Ambatipudi et al. · IEEE Solid-State Circuits Letters · 2018 · 41 citations

Analog-to-digital Converter, Radio Frequency, 16-Nm Cmos +8

A 112GB/S PAM4 Wireline Receiver Using a 64-Way Time-Interleaved SAR ADC in 16NM FinFET

James Hudner, Declan Carey, Ronan Casey et al. · 2018 · 35 citations

Continuous-time Linear Equalizers, Capacitance Buffer, Data Converter +6

A 112-GB/S PAM4 Transmitter in 16NM FinFET

KeeHian Tan, Ping-Chuan Chiang, Yipeng Wang et al. · 2018 · 26 citations

Low-power Electronics, Output Jitter, Electrical Engineering +12

An Inverter-Based Analog Front End for a 56 GB/S PAM4 Wireline Transceiver in 16NMCMOS

Kevin Zheng, Yohan Frans, Sai Lalith Chaitanya Ambatipudi et al. · 2018 · 18 citations

Electrical Engineering, Engineering, Data Converter +8