Stéphane Burignat

Substrate impact on threshold voltage and subthreshold slope of sub-32 nm ultra thin SOI MOSFETs with thin buried oxide and undoped channel

Stéphane Burignat, Denis Flandre, M. K. Md Arshad et al. · Solid-State Electronics · 2009 · 48 citations · Full text

Electrical Engineering, Substrate Impact, Engineering +9

Experimental study of transconductance and mobility behaviors in ultra-thin SOI MOSFETs with standard and thin buried oxides

Tamara Rudenko, Valeriya Kilchytska, Stéphane Burignat et al. · Solid-State Electronics · 2009 · 39 citations · Full text

Electrical Engineering, Engineering, Ultra-thin Soi Mosfets +7

Retention in metal–oxide–semiconductor structures with two embedded self-aligned Ge-nanocrystal layers

S. Duguay, Stéphane Burignat, P. Kern et al. · Semiconductor Science and Technology · 2007 · 24 citations

Drain / substrate coupling impact on DIBL of Ultra Thin Body and BOX SOI MOSFETs with undoped channel

Stéphane Burignat, M. K. Md Arshad, Jean‐Pierre Raskin et al. · 2009 · 15 citations

Device Modeling, Electrical Engineering, Engineering +13

Analog/RF performance of sub-100 nm SOI MOSFETs with non-classical gate-source/drain underlap channel design

Abhinav Kranti, Rashmi Rashmi, Stéphane Burignat et al. · 2010 · 14 citations

Low-power Electronics, Electrical Engineering, Engineering +12