Nay Aung Kyaw

Dual-Hiding Side-Channel-Attack Resistant FPGA-Based Asynchronous-Logic AES: Design, Countermeasures and Evaluation

Kwen‐Siong Chong, Jun-Sheng Ng, Juncheng Chen et al. · IEEE Journal on Emerging and Selected Topics in Circuits and Systems · 2021 · 35 citations · Full text

Engineering, Information Security, Hardware Algorithm +17

Low Gate-Count Ultra-Small Area Nano Advanced Encryption Standard (AES) Design

Aparna Shreedhar, Kwen‐Siong Chong, Ne Kyaw Zwa Lwin et al. · 2019 · 14 citations

Engineering, Vlsi Design, Computer Architecture +18

A Highly Efficient Power Model for Correlation Power Analysis (CPA) of Pipelined Advanced Encryption Standard (AES)

Jun-Sheng Ng, Juncheng Chen, Nay Aung Kyaw et al. · 2020 · 14 citations · Full text

Engineering, Cpa Sca, Information Security +18

Side-Channel-Attack Resistant Dual-Rail Asynchronous-Logic AES Accelerator Based on Standard Library Cells

Kwen‐Siong Chong, Aparna Shreedhar, Ne Kyaw Zwa Lwin et al. · 2019 · 11 citations

Engineering, Vlsi Design, Information Security +19