D. Huang

A 0.2-2 GHz 12 mW multiplying DLL for low-jitter clock synthesis in highly-integrated data communication chips

R. Farjad-Rad, William J. Dally, Hoik-Tiaq Ng et al. · 2002 IEEE International Solid-State Circuits Conference. Digest of Technical Papers (Cat. No.02CH37315) · 2003 · 36 citations

Engineering, Vlsi Design, Clock Multiplier +12

8-Gbps-per-channel radiation-tolerant VCSEL drivers for the LHC detector upgrade

X. Li, D. Guo, Jiefu Chen et al. · Journal of Instrumentation · 2015 · 17 citations

Gbps Data Rate, Vlsi Design, Radiation Detection +11

Land management institution as a key confinement of urbanization in Baotou, ChinaApplication of proposed endogenous urbanization model

Yongjiao Wu, Suocheng Dong, Jun Zhai et al. · Land Use Policy · 2016 · 13 citations · Full text

JTAG-based remote configuration of FPGAs over optical fibers

Boyu Deng, C. Liu, Jiefu Chen et al. · Journal of Instrumentation · 2015 · 12 citations · Full text

An Impersonal Multi-Attribute Weight Allocation Method Based on Attribute Importance

D. Huang · 2004 · 12 citations

Artificial Intelligence, Fuzzy Multi-criteria Decision-making, Fuzzy Aggregation Theory +15