A. Pangal

1.1 V 1 GHz communications router with on-chip body bias in 150 nm CMOS

S. Narendra, M. Haycock, V. Govindarajulu et al. · 2002 IEEE International Solid-State Circuits Conference. Digest of Technical Papers (Cat. No.02CH37315) · 2003 · 68 citations

Engineering, Computer Engineering, Electrical Engineering +16

5-GHz 32-bit integer execution core in 130-nm dual-V/sub T/ CMOS

Sriram Vangal, Mark Anders, Nitin Borkar et al. · IEEE Journal of Solid-State Circuits · 2002 · 35 citations

Engineering, Computer Engineering, Electrical Engineering +14

A 28.5 GB/s CMOS non-blocking router for terabit/s connectivity between multiple processors and peripheral I/O nodes

R. Nair, Nitin Borkar, Colin Browning et al. · 2002 · 18 citations

Engineering, Computer Engineering, Electrical Engineering +17