J.T. Stonick

An adaptive pam-4 5-Gb/s backplane transceiver in 0.25-μm CMOS

J.T. Stonick, Gu-Yeon Wei, J.L. Sonntag et al. · IEEE Journal of Solid-State Circuits · 2003 · 133 citations

Wireless Communications, Typical Fr-4 Backplanes, Engineering +10

A Digital Clock and Data Recovery Architecture for Multi-Gigabit/s Binary Links

J.L. Sonntag, J.T. Stonick · IEEE Journal of Solid-State Circuits · 2006 · 128 citations

Engineering, Analog Design, General Architecture +16

Adaptive digital correction of analog errors in MASH ADCs. II. Correction using test-signal injection

P. Kiss, J. Silva, Andreas Wiesbauer et al. · IEEE Transactions on Circuits and Systems II Analog and Digital Signal Processing · 2000 · 100 citations

Engineering, Different Adaptation Strategy, Analog Design +18

A multigigabit backplane transceiver core in 0.13-/spl mu/m CMOS with a power-efficient equalization architecture

D.A. Yokoyama-Martin, A. Caffee, Curtis G. Jones et al. · IEEE Journal of Solid-State Circuits · 2005 · 43 citations

Low-power Electronics, Cascode Structure, Electrical Engineering +14

Spectral analysis of time-domain phase jitter measurements

Un-Ku Moon, Kartikeya Mayaram, J.T. Stonick · IEEE Transactions on Circuits and Systems II Analog and Digital Signal Processing · 2002 · 34 citations

Spectral Theory, Engineering, Measurement +16