Paulo F. Butzen

BTI, HCI and TDDB aging impact in flip–flops

Cicero S. Nunes, Paulo F. Butzen, André I. Reis et al. · Microelectronics Reliability · 2013 · 36 citations

Engineering, Vlsi Design, Computer Engineering +3

Standby power consumption estimation by interacting leakage current mechanisms in nanoscaled CMOS digital circuits

Paulo F. Butzen, Leomar S. da Rosa, Erasmo J.D. Chiappetta Filho et al. · Microelectronics Journal · 2010 · 25 citations · Full text

An array-based test circuit for fully automated gate dielectric breakdown characterization

John Keane, Shrinivas Venkatraman, Paulo F. Butzen et al. · 2008 · 24 citations

Engineering, Array-based Test Circuit, Gate Resistance +16

Analysis of 6 T SRAM cell in sub-45 nm CMOS and FinFET technologies

Riberet Almeida, Cleiton M. Marques, Paulo F. Butzen et al. · Microelectronics Reliability · 2018 · 22 citations

Electrical Engineering, T Sram Cell, Vlsi Design +9

Design of CMOS logic gates with enhanced robustness against aging degradation

Paulo F. Butzen, Vinícius Dal, André I. Reis et al. · Microelectronics Reliability · 2012 · 16 citations

Electrical Engineering, Engineering, Cmos Logic Gates +6