F. Jain

Design of Ternary Logic Combinational Circuits Based on Quantum Dot Gate FETs

Supriya Karmakar, J. Chandy, F. Jain · IEEE Transactions on Very Large Scale Integration (VLSI) Systems · 2012 · 98 citations

Three-state Qdgfets, Simplified Circuit Model, Electrical Engineering +8

Formation of an Active Electronic Barrier at Al/Semiconductor Interfaces: A Novel Approach in Corrosion Prevention

F. Jain, J. J. Rosato, K. S. Kalonia et al. · CORROSION · 1986 · 83 citations

Materials Science, Aluminium Nitride, Corrosion Protection +15

Novel Quantum Dot Gate FETs and Nonvolatile Memories Using Lattice-Matched II–VI Gate Insulators

F. Jain, E. Suarez, Mukesh Gogna et al. · Journal of Electronic Materials · 2009 · 55 citations

Quantum Science, Non-volatile Memory, Engineering +6

Misfit dislocation density and strain relaxation in graded semiconductor heterostructures with arbitrary composition profiles

B. Bertoli, E. Suarez, John E. Ayers et al. · Journal of Applied Physics · 2009 · 48 citations

Materials Engineering, Electrical Engineering, Uniform Layer Thickness +14

Configured Semiconductor/Insulator Coatings for Corrosion Prevention

F. Jain, J. J. Rosato, K. S. Kalonia et al. · MRS Proceedings · 1988 · 48 citations

Materials Science, Electrical Engineering, Corrosion Protection +7