D. Bakalis

An efficient seeds selection method for LFSR-based test-per-clock BIST

Emmanouil Kalligeros, Xrysovalantis Kavousianos, D. Bakalis et al. · 2003 · 27 citations

Hardware Security, Electrical Engineering, Engineering +14

On the Design of Modulo 2 n ±1 Subtractors and Adders/Subtractors

Evangelos Vassalos, D. Bakalis, H.T. Vergos · Circuits Systems and Signal Processing · 2011 · 21 citations

Modulo 2, Modulus Problem, N ±1 Subtractors +1

On-the-Fly Reseeding: A New Reseeding Technique for Test-Per-Clock BIST

Emmanouil Kalligeros, Xrysovalantis Kavousianos, D. Bakalis et al. · Journal of Electronic Testing · 2002 · 19 citations

Efficient partial scan cell gating for low-power scan-based testing

Xrysovalantis Kavousianos, D. Bakalis, Dimitris Nikolos · ACM Transactions on Design Automation of Electronic Systems · 2009 · 19 citations

Engineering, Power Optimization (Eda), Mem Testing +19

New reseeding technique for LFSR-based test pattern generation

Emmanouil Kalligeros, Xrysovalantis Kavousianos, D. Bakalis et al. · 2002 · 19 citations

Engineering, Test Pattern Generator, Mem Testing +17