Concepedia

S. Narendra

SN

Statistics

Publications

3

Citations

143

H-Index

3

Active since

2000

Affiliations

Intel (United States)(Current)

S. Narendra is an author at Intel (United States) specializing in computer architecture, engineering, and semiconductor devices.

Publications per year

2000–2004

3

Publications

3

Parameter variations and impact on circuits and microarchitecture

S. Borkar, T. Karnik, S. Narendra et al. · Proceedings 2003. Design Automation Conference (IEEE Cat. No.03CH37451) · 2004 · 84 citations

Engineering, Computer Engineering, Computer Science +17

Effectiveness of reverse body bias for leakage control in scaled dual Vt CMOS ICs

A. Keshavarzi, Shuo Ma, S. Narendra et al. · 2002 · 49 citations

Engineering, Computer Engineering, Computer Science +10

Dual-V/sub T/ SRAM cells with full-swing single-ended bit line sensing for high-performance on-chip cache in 0.13 /spl mu/m technology generation

F. Hamzaoglu, Y. Ye, A. Keshavarzi et al. · ISLPED'00: Proceedings of the 2000 International Symposium on Low Power Electronics and Design (Cat. No.00TH8514) · 2000 · 10 citations

Engineering, Computer Engineering, Electrical Engineering +15

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