Shreepad Panth

Design and CAD methodologies for low power gate-level monolithic 3D ICs

Shreepad Panth, Kambiz Samadi, Yang Du et al. · 2014 · 118 citations

Transistor-level M3d, 3D Ic Architecture, Electrical Engineering +14

3D-MAPS: 3D Massively parallel processor with stacked memory

Dae Hyun Kim, Krit Athikulwongse, Michael B. Healy et al. · 2012 · 117 citations

Engineering, Computer Architecture, Computer-aided Design +23

Shrunk-2-D: A Physical Design Methodology to Build Commercial-Quality Monolithic 3-D ICs

Shreepad Panth, Kambiz Samadi, Yang Du et al. · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems · 2017 · 88 citations

Engineering, Vlsi Design, Computer Architecture +21

High-density integration of functional modules using monolithic 3D-IC technology

Shreepad Panth, Kambiz Samadi, Yang Du et al. · 2013 · 68 citations

Engineering, Vlsi Design, Computer Architecture +19

Design and Analysis of 3D-MAPS (3D Massively Parallel Processor with Stacked Memory)

Dae Hyun Kim, Krit Athikulwongse, Michael B. Healy et al. · IEEE Transactions on Computers · 2013 · 64 citations

Engineering, Vlsi Design, Memory Tier +24