Mehmet Batuhan Dayanik

A 36.3-to-38.2GHz −216dBc/Hz² 40nm CMOS fractional-N FMCW chirp synthesizer PLL with a continuous-time bandpass delta-sigma time-to-digital converter

Daniel Weyer, Mehmet Batuhan Dayanik, Sunmin Jang et al. · 2018 · 36 citations

Engineering, Electrical Engineering, Analog Electronics +16

Digital Fractional-<inline-formula> <tex-math notation="LaTeX">$N$ </tex-math> </inline-formula> PLLs Based on a Continuous-Time Third-Order Noise-Shaping Time-to-Digital Converter for a 240-GHz FMCW Radar System

Mehmet Batuhan Dayanik, Michael P. Flynn · IEEE Journal of Solid-State Circuits · 2018 · 20 citations

Engineering, Electrical Engineering, Analog Electronics +16

A 5GS/s 156MHz BW 70dB DR continuous-time sigma-delta modulator with time-interleaved reference data-weighted averaging

Mehmet Batuhan Dayanik, Daniel Weyer, Michael P. Flynn · 2017 · 18 citations

Engineering, Computer Engineering, Electrical Engineering +15

A 28.5–33.5GHz fractional-N PLL using a 3<sup>rd</sup> order noise shaping time-to-digital converter with 176fs resolution

Mehmet Batuhan Dayanik, Nicholas Collins, Michael P. Flynn · 2015 · 11 citations

Engineering, Computer Engineering, Electrical Engineering +12

Design Considerations for Integrated Radar Chirp Synthesizers

Daniel Weyer, Mehmet Batuhan Dayanik, Lu Jie et al. · IEEE Access · 2019 · 11 citations · Full text

Engineering, Electrical Engineering, Field-programmable Gate Arrays +13