Aditya Japa

Hardware Security Exploiting Post-CMOS Devices: Fundamental Device Characteristics, State-of-the-Art Countermeasures, Challenges and Roadmap

Aditya Japa, Manoj Kumar Majumder, Subhendu Kumar Sahoo et al. · IEEE Circuits and Systems Magazine · 2021 · 33 citations

Engineering, Computer Engineering, Electrical Engineering +16

Negative capacitance FETs for energy efficient and hardware secure logic designs

Renuka Chowdary Bheemana, Aditya Japa, Siva Yellampalli et al. · Microelectronics Journal · 2021 · 26 citations

Engineering, Computer Engineering, Electrical Engineering +17

Reliability enhancement of a steep slope tunnel transistor based ring oscillator designs with circuit interaction

Aditya Japa, Harshita Vallabhaneni, Ramesh Vaddi · IET Circuits Devices & Systems · 2016 · 18 citations

Engineering, Electrical Engineering, Low-power Design +13

Negative capacitance FET based energy efficient and DPA attack resilient ultra-light weight block cipher design

Renuka Chowdary Bheemana, Aditya Japa, Siva Yellampalli et al. · Microelectronics Journal · 2023 · 17 citations

Engineering, Computer Engineering, Electrical Engineering +17

Tunneling Field Effect Transistors for Enhancing Energy Efficiency and Hardware Security of IoT Platforms: Challenges and Opportunities

Aditya Japa, T. Nagateja, Santosh Kumar Vishvakarma et al. · 2018 · 12 citations

Engineering, Computer Engineering, Electrical Engineering +17