E. Mohapatra

Design study of gate-all-around vertically stacked nanosheet FETs for sub-7nm nodes

E. Mohapatra, Taraprasanna Dash, J. Jena et al. · SN Applied Sciences · 2021 · 28 citations · Full text

Strain-engineering in nanowire field-effect transistors at 3 nm technology node

Taraprasanna Dash, S. Dey, Sanghamitra Das et al. · Physica E Low-dimensional Systems and Nanostructures · 2020 · 25 citations

Semiconductor Technology, Nanowire Field-effect Transistors, Electrical Engineering +8

Strain induced variability study in Gate-All-Around vertically-stacked horizontal nanosheet transistors

E. Mohapatra, Taraprasanna Dash, J. Jena et al. · Physica Scripta · 2020 · 21 citations

Device Modeling, Semiconductor Technology, Electrical Engineering +14

Vertically-Stacked Silicon Nanosheet Field Effect Transistors at 3nm Technology Nodes

Taraprasanna Dash, S. Dey, E. Mohapatra et al. · 2019 Devices for Integrated Circuit (DevIC) · 2019 · 20 citations

Vertically-stacked Sns-fets, Vlsi Design, Engineering +16

Performance comparison of strained-SiGe and bulk-Si channel FinFETs at 7 nm technology node

Taraprasanna Dash, S. Dey, Soumyadeep Das et al. · Journal of Micromechanics and Microengineering · 2019 · 15 citations

Engineering, Silicon On Insulator, Semiconductor Device +16