Ahmed Elkholy

A 3.7 mW Low-Noise Wide-Bandwidth 4.5 GHz Digital Fractional-N PLL Using Time Amplifier-Based TDC

Ahmed Elkholy, Tejasvi Anand, Woo‐Seok Choi et al. · IEEE Journal of Solid-State Circuits · 2015 · 126 citations

High Resolution Tdc, Data Converter, Mixed-signal Integrated Circuit +5

A 2.0–5.5 GHz Wide Bandwidth Ring-Based Digital Fractional-N PLL With Extended Range Multi-Modulus Divider

Ahmed Elkholy, Saurabh Saxena, Romesh Kumar Nandwana et al. · IEEE Journal of Solid-State Circuits · 2016 · 77 citations

Proposed Digital Fnpll, Phase Noise Performance, Clock Recovery +5

Design and Analysis of Low-Power High-Frequency Robust Sub-Harmonic Injection-Locked Clock Multipliers

Ahmed Elkholy, Mrunmay Talegaonkar, Tejasvi Anand et al. · IEEE Journal of Solid-State Circuits · 2015 · 65 citations

Low-power Electronics, Electrical Engineering, Engineering +8

A Calibration-Free Fractional-N Ring PLL Using Hybrid Phase/Current-Mode Phase Interpolation Method

Romesh Kumar Nandwana, Tejasvi Anand, Saurabh Saxena et al. · IEEE Journal of Solid-State Circuits · 2015 · 53 citations

Electrical Engineering, Phase Noise Performance, Clock Multiplier +5

A 12-Gb/s -16.8-dBm OMA Sensitivity 23-mW Optical Receiver in 65-nm CMOS

Mostafa G. Ahmed, Mrunmay Talegaonkar, Ahmed Elkholy et al. · IEEE Journal of Solid-State Circuits · 2017 · 52 citations

Photonics, Large Feedback Resistance, Engineering +11