Seokhyeong Kang - Concepedia

Author

Seokhyeong Kang

Pohang University of Science and Technology ORCID

Also Known As

Kang, Seokhyeong, S. KANG, S. Kang, Sang-Won Kang, SeokHyeong Kang, Seokhyeong Kang, Sunmean Kim

147

Publications

1.9K

Citations

H-Index

Concepts

All Affiliations

Pohang University of Science and Technology University of California San Diego Ulsan National Institute of Science and Technology University of Illinois Urbana-Champaign Samsung (South Korea)

About

Seokhyeong Kang is an author at Pohang University of Science and Technology specializing in engineering, computer engineering, and computer architecture.

Top Concepts

#	Concept	H-Index	Publications	Citations
1	Engineering	19	29	1.4K
2	Computer Engineering	17	27	1.3K
3	Computer Science	10	10	694
4	Health Sciences	1	1	20
5	Applied Physics	1	1	11

Seokhyeong Kang

Publications

1.7K

Citations

H-Index

Page 1

	Year	Citations
Accuracy-configurable adder for approximate arithmetic designs Andrew B. Kahng, Seokhyeong Kang Accuracy-configurable AdderEngineeringEnergy EfficiencyComputer ArchitecturePower Optimization	2012	418
A Logic Synthesis Methodology for Low-Power Ternary Logic Circuits Sunmean Kim, Sung-Yun Lee, Sunghye Park, IEEE Transactions on Circuits and Systems I Regular Papers Low-power ElectronicsLogic SynthesisElectrical EngineeringEngineeringVlsi Design	2020	131
Designing a processor from the ground up to allow voltage/reliability tradeoffs Andrew B. Kahng, Seokhyeong Kang, Rakesh Kumar, EngineeringPower Optimization (Eda)Computer ArchitecturePower OptimizationEmbedded Systems	2010	88
Slack redistribution for graceful degradation under voltage overscaling Andrew B. Kahng, Seokhyeong Kang, Rakesh Kumar, EngineeringVlsi DesignPower Optimization (Eda)Computer ArchitectureSystem-level Design	2010	67
Sensitivity-guided metaheuristics for accurate discrete gate sizing Jin Hu, Andrew B. Kahng, Seokhyeong Kang, EngineeringVlsi DesignRigorous ProtocolPower Optimization (Eda)Computer Architecture	2012	66
Statistical analysis and modeling for error composition in approximate computation circuits Wei-Ting Jonas Chan, Andrew B. Kahng, Seokhyeong Kang, EngineeringVlsi DesignElectronic Design AutomationComputer ArchitectureComputational Complexity	2013	59
Ternary Full Adder Using Multi-Threshold Voltage Graphene Barristors Sunwoo Heo, Sunmean Kim, Kiyung Kim, IEEE Electron Device Letters EngineeringTernary Logic CircuitSemiconductorsGraphene NanomeshesGraphene-based Nano-antennas	2018	56
Learning-based approximation of interconnect delay and slew in signoff timing tools Andrew B. Kahng, Seokhyeong Kang, Hyein Lee,	2013	54
An optimal gate design for the synthesis of ternary logic circuits Sunmean Kim, Taeho Lim, Seokhyeong Kang 2018 23rd Asia and South Pacific Design Automation Conference (ASP-DAC) Circuit ComplexityLogic SynthesisElectrical EngineeringEngineeringVlsi Design	2018	48
Slack redistribution for graceful degradation under voltage overscaling Andrew B. Kahng, Seokhyeong Kang, Rakesh Kumar,	2010	44

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