Tin Tin Wee

A Versatile 90-nm CMOS Charge-Pump PLL for SerDes Transmitter Clocking

Alvin L. S. Loke, Robert K. Barnes, Tin Tin Wee et al. · IEEE Journal of Solid-State Circuits · 2006 · 68 citations

Low-power Electronics, Electrical Engineering, Ps Rms Jitter +13

Analog/mixed-signal design challenges in 7-nm CMOS and beyond

Alvin L. S. Loke, Da Yang, Tin Tin Wee et al. · 2018 · 33 citations

Engineering, Vlsi Design, Analog Design +16

Constant-Current Threshold Voltage Extraction in HSPICE for Nanoscale CMOS Analog Design

Alvin L. S. Loke, Zhiyuan Wu, Reza Moallemi et al. · 2010 · 23 citations

Low-power Electronics, Device Modeling, Electrical Engineering +15

Analog/Mixed-Signal Design Challenges in 7-nm CMOS and Beyond

Alvin L. S. Loke, Da Yang, Tin Tin Wee et al. · 2019 · 18 citations

System On Chip, Electrical Engineering, Engineering +15

Loopback architecture for wafer-level at-speed testing of embedded HyperTransport<sup>TM</sup> processor links

Alvin L. S. Loke, Bruce A. Doyle, Michael M. Oshima et al. · 2009 · 10 citations

Engineering, Vlsi Design, Computer Architecture +18