Bram Rooseleer

A 22 nm, 1540 TOP/s/W, 12.1 TOP/s/mm² in-Memory Analog Matrix-Vector-Multiplier for DNN Acceleration

Ioannis A. Papistas, Stefan Cosemans, Bram Rooseleer et al. · 2021 · 39 citations

Electrical Engineering, Engineering, Machine Learning +14

A 40 nm, 454MHz 114 fJ/bit area-efficient SRAM memory with integrated charge pump

Bram Rooseleer, Wim Dehaene · 2013 · 21 citations

Low-power Electronics, Non-volatile Memory, Electrical Engineering +15

A 65 nm, 850 MHz, 256 kbit, 4.3 pJ/access, Ultra Low Leakage Power Memory Using Dynamic Cell Stability and a Dual Swing Data Link

Bram Rooseleer, Stefan Cosemans, Wim Dehaene · IEEE Journal of Solid-State Circuits · 2012 · 21 citations

Hardware Security, Low-power Electronics, Electrical Engineering +12

11.3 Metis AIPU: A 12nm 15TOPS/W 209.6TOPS SoC for Cost- and Energy-Efficient Inference at the Edge

Pascal Alexander Hager, Bert Moons, Stefan Cosemans et al. · 2024 · 15 citations

A 65 nm, 850 MHz, 256 kbit, 4.3 pJ/access, ultra low leakage power memory using dynamic cell stability and a dual swing data link

Bram Rooseleer, Stefan Cosemans, Wim Dehaene · 2011 · 12 citations · Full text

Hardware Security, Low-power Electronics, Electrical Engineering +11