F. Tsay

A 16-bit 65-MS/s 3.3-V pipeline ADC core in SiGe BiCMOS with 78-dB SNR and 180-fs jitter

A. Zanchi, F. Tsay · IEEE Journal of Solid-State Circuits · 2005 · 38 citations

Engineering, Vlsi Design, Analog-to-digital Converter +10

Polycide/metal capacitors for high precision A/D converters

Çağlar Kaya, H. L. Tigelaar, J. Paterson et al. · 2003 · 36 citations

Electrical Engineering, Engineering, Polycide/metal Capacitors +9

A 10 b 100 MSample/s CMOS pipelined ADC with 1.8 V power supply

Yong‐In Park, Subburamu Karthikeyan, F. Tsay et al. · 2002 · 35 citations

Low-power Electronics, V Power Supply, Engineering +12

Impact of capacitor dielectric relaxation on a 14-bit 70-MS/s pipeline ADC in 3-V BiCMOS

A. Zanchi, F. Tsay, I. Papantonopoulos · IEEE Journal of Solid-State Circuits · 2003 · 26 citations

Semiconductor Technology, Electrical Engineering, Engineering +14

A low power 10 bit, 80 MS/s CMOS pipelined ADC at 1.8 V power supply

Yong-In Park, S. Karthikeyan, F. Tsay et al. · 2002 · 17 citations

Low-power Electronics, V Power Supply, Low Power 10 +13