Reid Wistort

A 32 nm 0.58-fJ/Bit/Search 1-GHz Ternary Content Addressable Memory Compiler Using Silicon-Aware Early-Predict Late-Correct Sensing With Embedded Deep-Trench Capacitor Noise Mitigation

Igor Arsovski, Travis Hebig, Daniel Dobson et al. · IEEE Journal of Solid-State Circuits · 2013 · 56 citations

Engineering, Computer Engineering, Electrical Engineering +17

Self-referenced sense amplifier for across-chip-variation immune sensing in high-performance Content-Addressable Memories

Igor Arsovski, Reid Wistort · 2006 · 28 citations

Engineering, Computer Engineering, Electrical Engineering +13

A 940 MHz data rate 8 Mb CMOS SRAM

G. Braceras, A. Roberts, J. Conner et al. · 2003 · 11 citations

Engineering, Computer Engineering, Electrical Engineering +14

1Gsearch/sec Ternary Content Addressable Memory compiler with silicon-aware Early-Predict Late-Correct single-ended sensing

Igor Arsovski, Travis Hebig, Daniel Dobson et al. · 2012 · 11 citations

Engineering, Computer Engineering, Computer Science +13

A 0.9ns random cycle 36Mb network SRAM with 33mW standby power

Harold Pilo, G. Braceras, Shawn A. Hall et al. · 2004 · 11 citations

Engineering, Computer Engineering, Electrical Engineering +13