Z.G. Vranesic

Chortle-crf: Fast technology mapping for lookup table-based FPGAs

Robert J. Francis, Jonathan Rose, Z.G. Vranesic · 1991 · 261 citations

Hardware Security, Logic Synthesis, Chortle-crf Program +13

A detailed router for field-programmable gate arrays

Stephen D. Brown, Jonathan Rose, Z.G. Vranesic · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems · 1992 · 153 citations

Engineering, Detailed Routing Algorithm, Pathfinding +19

Technology mapping of lookup table-based FPGAs for performance

Robert J. Francis, Jonathan Rose, Z.G. Vranesic · 1991 · 139 citations

Engineering, Vlsi Design, Technology Mapping +17

The multicluster architecture: reducing cycle time through partitioning

Keith I. Farkas, Paul Chow, Norman P. Jouppi et al. · 2002 · 129 citations

Cluster Computing, Engineering, Computer Architecture +17

Heuristics for Area Minimization in LUT-Based FPGA Technology Mapping

Valavan Manohararajah, Stephen D. Brown, Z.G. Vranesic · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems · 2006 · 124 citations

Cartography, Duplication-free Mapping Modes, Engineering +13