H.S. Fetterman

A 250-mW, 8-b, 52-Msamples/s parallel-pipelined A/D converter with reduced number of amplifiers

K. Nagaraj, H.S. Fetterman, J. Anidjar et al. · IEEE Journal of Solid-State Circuits · 1997 · 188 citations

Conventional Pipeline Architecture, Parallel-pipelined A/d Converter, Data Converter +6

A 14-bit 80-kHz sigma-delta A/D converter: modeling, design and performance evaluation

Steven R. Norsworthy, I.G. Post, H.S. Fetterman · IEEE Journal of Solid-State Circuits · 1989 · 94 citations

Electrical Engineering, Engineering, Data Converter +9

CMOS pipelined ADC employing dither to improve linearity

H.S. Fetterman, D.G. Martin, D.A. Rich · 2003 · 26 citations

Data Converter, Digital Error Correction, Analog Design +4

A pipelined 9-stage video-rate analog-to-digital converter

S.H. Lewis, H.S. Fetterman, G.F. Gross et al. · 2002 · 16 citations

Improved Correction Algorithm, Data Converter, Mixed-signal Integrated Circuit +5

An 8-bit 50+ Msamples/s pipelined A/D converter with an area and power efficient architecture

K. Nagaraj, H.S. Fetterman, R. Shariatdoust et al. · 2002 · 10 citations