Arun Vaidyanath

Effect of CMOS driver loading conditions on simultaneous switching noise

Arun Vaidyanath, B. Thoroddsen, J.L. Prince · IEEE Transactions on Components Packaging and Manufacturing Technology Part B · 1994 · 82 citations

Electrical Engineering, Critical Inductance, Vlsi Design +12

A Tri-Modal 20-Gbps/Link Differential/DDR3/GDDR5 Memory Interface

Kambiz Kaviani, Ting Wu, J. Wei et al. · IEEE Journal of Solid-State Circuits · 2012 · 39 citations

Hardware Security, Engineering, Vlsi Design +10

Simultaneous switching noise: influence of plane-plane and plane-signal trace coupling

Arun Vaidyanath, B. Thoroddsen, J.L. Prince et al. · IEEE Transactions on Components Packaging and Manufacturing Technology Part B · 1995 · 30 citations

Distribution Planes, Electrical Engineering, Engineering Noise Control +13

A 12.8-Gb/s/link Tri-Modal Single-Ended Memory Interface

Amir Amirkhany, J. Wei, N. Mishra et al. · IEEE Journal of Solid-State Circuits · 2012 · 23 citations

Hardware Security, Engineering, Vlsi Design +11

Impedance Perturbation Theory for Coupled Uniform Transmission Lines

Gen Yin, Xiao-Ding Cai, David Secker et al. · IEEE Transactions on Electromagnetic Compatibility · 2015 · 20 citations

Transmission Lines, Electrical Engineering, Engineering +10