Tutu Ajayi

Toward an Open-Source Digital Flow

Tutu Ajayi, Vidya A. Chhabria, Mateus Fogaça et al. · 2019 · 165 citations · Full text

Engineering, Computer Engineering, Computer Science +17

The Celerity Open-Source 511-Core RISC-V Tiered Accelerator Fabric: Fast Architectures and Design Methodologies for Fast Chips

Scott Davidson, Shaolin Xie, Christopher Torng et al. · IEEE Micro · 2018 · 86 citations

Engineering, Computer Engineering, Computer Science +17

An Open-source Framework for Autonomous SoC Design with Analog Block Generation

Tutu Ajayi, Sumanth Kamineni, Yaswanth Kumar Cherivirala et al. · 2020 · 33 citations

Engineering, Computer Engineering, Design +17

Evaluating Celerity: A 16-nm 695 Giga-RISC-V Instructions/s Manycore Processor With Synthesizable PLL

Austin Rovinski, Bandhav Veluri, Anuj Rao et al. · IEEE Solid-State Circuits Letters · 2019 · 21 citations

Engineering, Computer Engineering, Computer Science +16

A 1.4 GHz 695 Giga Risc-V Inst/s 496-Core Manycore Processor With Mesh On-Chip Network and an All-Digital Synthesized PLL in 16nm CMOS

Austin Rovinski, Chun Zhao, Khalid Al-Hawaj et al. · 2019 · 19 citations

Engineering, Computer Engineering, Computer Science +17