Concepedia

J. Mori

JM

Statistics

Publications

3

Citations

208

H-Index

3

Active since

1989

Affiliations

Toshiba (Japan)(Current)

J. Mori is an author at Toshiba (Japan) specializing in low-power design, multiplier design, and multipliers.

Publications per year

1989–1991

3

Publications

3

A 10 ns 54*54 b parallel structured full array multiplier with 0.5 mu m CMOS technology

J. Mori, M. Nagamatsu, M. Hirano et al. · IEEE Journal of Solid-State Circuits · 1991 · 98 citations

, , +13

A 15-ns 32*32-b CMOS multiplier with an improved parallel structure

M. Nagamatsu, S. Tanaka, J. Mori et al. · IEEE Journal of Solid-State Circuits · 1990 · 88 citations

, , +16

A 15 ns 32×32-bit CMOS multiplier with an improved parallel structure

M. Nagamatsu, S. Tanaka, J. Mori et al. · 1989 · 22 citations

, , +16

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