M. Nekili

Optimal methods of driving interconnections in VLSI circuits

M. Nekili, Yvon Savaria · 2003 · 51 citations

Electrical Engineering, Engineering, Vlsi Design +12

Pipelined H-trees for high-speed clocking of large integrated systems in presence of process variations

M. Nekili, Guy Bois, Yvon Savaria · IEEE Transactions on Very Large Scale Integration (VLSI) Systems · 1997 · 32 citations

Engineering, Vlsi Design, High-speed Clocking +20

Parallel regeneration of interconnections in VLSI & ULSI circuits

M. Nekili, Yvon Savaria · 1993 IEEE International Symposium on Circuits and Systems · 2002 · 24 citations

Electrical Engineering, Engineering, Vlsi Design +14

On Modeling of Parallel Repeater-Insertion Methodologies for SoC Interconnects

Falah Awwad, M. Nekili, V. Ramachandran et al. · IEEE Transactions on Circuits and Systems I Regular Papers · 2008 · 18 citations

Engineering, Vlsi Design, Computer Architecture +16

Spatial characterization of process variations via MOS transistor time constants in VLSI and WSI

M. Nekili, Yvon Savaria, Guy Bois · IEEE Journal of Solid-State Circuits · 1999 · 14 citations

Engineering, Vlsi Design, Oscillation Period +17