R. Balasaikesava is an author at SRKR Engineering College specializing in computer architecture, engineering, and computer engineering.
Top concepts
EngineeringVlsi DesignParallel ComputingComputer EngineeringComputer ArchitectureElectrical EngineeringComputer ScienceHardware SystemsMicroelectronicsHardware Security
Publications per year
2016–2016
2
2
Design of delay efficient modified 16 bit Wallace multiplier
G. Challa Ram, D. Sudha Rani, R. Balasaikesava et al. · 2016 · 29 citations
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