Hae-Woong Yang

A Reconfigurable 16/32 Gb/s Dual-Mode NRZ/PAM4 SerDes in 65-nm CMOS

Ashkan Roshan-Zamir, Osama Elhadidy, Hae-Woong Yang et al. · IEEE Journal of Solid-State Circuits · 2017 · 113 citations

System On Chip, Electrical Engineering, Engineering +12

A 56-Gb/s PAM4 Receiver With Low-Overhead Techniques for Threshold and Edge-Based DFE FIR- and IIR-Tap Adaptation in 65-nm CMOS

Ashkan Roshan-Zamir, Takayuki Iwai, Yang-Hang Fan et al. · IEEE Journal of Solid-State Circuits · 2018 · 72 citations

Moderate Channel Loss, Engineering, Mixed-signal Integrated Circuit +12

A 0.47–0.66 pJ/bit, 4.8–8 Gb/s I/O Transceiver in 65 nm CMOS

Younghoon Song, Rui Bai, Kangmin Hu et al. · IEEE Journal of Solid-State Circuits · 2013 · 51 citations

Low-power Electronics, Electrical Engineering, Output/input Multiplexing +14

A 32 Gb/s 0.55 mW/Gbps PAM4 1-FIR 2-IIR tap DFE receiver in 65-nm CMOS

Osama Elhadidy, Ashkan Roshan-Zamir, Hae-Woong Yang et al. · 2015 · 30 citations

Low-power Electronics, Gb/s 0.55, Engineering +10

An 8–16 Gb/s, 0.65–1.05 pJ/b, Voltage-Mode Transmitter With Analog Impedance Modulation Equalization and Sub-3 ns Power-State Transitioning

Younghoon Song, Hae-Woong Yang, Hao Li et al. · IEEE Journal of Solid-State Circuits · 2014 · 20 citations

Low-power Electronics, Electrical Engineering, Voltage-mode Transmitter +12